2024

• Jaejin Kim and Jintae Kim, “A Single-Channel 3.1GS/s 41dB SNDR Pipelined ADC using Amplify-and-Select Structure in 28nm CMOS”, in Proceedings of IEEE Asian Solid-State Circuit Conference (ASSCC), Nov. 2024.

• Jonghyeok Won and Jintae Kim, “A 28/56 Gb/s NRZ/PAM-4 Dual-Mode Transmitter with Eye-Opening Enhancement in 28 nm CMOS”, MDPI Electronics, 13, 3774, pp. 1-9, Sep. 2024.

• Jongho Kim, Gyuchan Cho, and Jintae Kim, “A 7GHz ERBW 1.1GS/s 6-bit PVT Tolerant Asynchronous CI-SAR with only 8.5fF Input Capacitance in 28nm CMOS”, IEEE Journal of Solid-State Circuits, vol. 59. no. 3, pp.765-773, Jan. 2024.

2023

• Azat Azamat, Faaiz Asim, Jintae Kim, and Jongeun Lee, “Partial Sum Quantization for Reducing ADC Size in ReRAM-based Neural Network Accelerators,” IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 42, no. 12, pp.4897-4908, Dec. 2023.

• Jongho Kim, Young H. Oh, Hyeonsik Kim, Jae. W. Lee, and Jintae Kim, “A 4-bit 4.5-ns-Latency Pseudo-ReRAM Compuing-In-Memory Macro with Self-Error-Correcting DTC-based WL Drivers and 6-Bit CDAC-less Column ADCs having Ultra-narrow Pitch,” IEEE Transactions on Circuits and Systems-II: Express Brief, vol. 70, no. 9, pp.3228-3232, Sep. 2023.

• Jongho Kim, Gyuchan Cho, and Jintae Kim, “A 7GHz ERBW 1.1GS/s 6-bit PVT Tolerant Asynchronous CI-SAR with only 8.5fF Input Capacitance,” in Proceedings of IEEE CICC, Apr. 2023.

• Hwankyu Song, Gyuchan Cho, and Jintae Kim “A 7.9-ENOB 1.5GS/s Common-Mode and Temperature Insensitive Pipelined-SAR ADC with an On-chip Temperature-Sensor-Based Stage Gain Compensation,” in Proceedings of IEEE CICC, Apr. 2023.

• Jeonghyun Lee, Yoonseo Cho, Jintae Kim, and Jaehyouk Choi, “A 0.009mm2, 6.5mW, 6.2b-ENOB 2.5GS/s Flash-and-VCO-Based Subranging ADC Using a Resistor-Ladder-Based Residue Shifter,” in Proceedings of IEEE CICC, Apr. 2023.

• Seonhyeok Baek, H. Kim, H. Hwang, A. M. Kaba, H. Kim, M. Chung, Jintae Kim, and Dohyun Kim, “A Laser-Micromachined PCB Electolytic Micropump Using an Oil-Based Electrolyte Separation Barrier,” BioChip Journal, March 2023.

• Hyeonsik Kim, Soohoon Lee, and Jintae Kim,“A 9-bit 500-MS/s 4-Stage Pipelined SAR ADC with Wide Input Common-More Range Using Replica-Biased Dynamic Amplifiers,” IEEE Access, vol. 11, pp. 22531-22541, Feb. 2023.

2022

• Jihyun Baek, Jonghyun Kim, Gyuchan Cho, Jintae Kim, and Hyungil Chae, “A 7-Bit 4-GS/s Quad-Channel Time-Interleaved SAR ADC With 2-Then-1-Bit/Cycle Conversion,” in Proceedings of IEEE ASSCC, Nov. 6-9, 2022.

• Hyeonsik Kim, Heejune Lee and Jintae Kim, “A 1.25 MHz, 108dB Chopped Sampling-Mixer-Based Impedance Spectroscopy SoC in 0.18um CMOS,” MDPI Electronics, 11(24), 2022.

• Soyeon Park and Jintae Kim, “A 0.17 pJbit 28 Gbs/pin Single-Ended PAM-4 Transmitter for On-Chip Short-Reach Unterminated Channels,” MDPI Electronics, 11(22), 2022.

• Soohoon Lee and Jintae Kim, “A dither-less bit weight digital background calibration for bridge CDAC successive approximation register ADCs,” IET Electronics Letters, Jul., 2022.

• Hyeonsik Kim, Seonkyung Kim, and Jintae Kim, “A 1.55-mW 2-GHz ERBW 7-b 800-MS/s Pipelined SAR ADC in 28-nm CMOS Using a 7T Dynamic Residue Amplifier,” IEEE Solid-State Circuit Letters (SSCL), vol. 5, pp. 102-105, 2022.

2021

• Hyeonsik Kim, Seonkyung Kim, and Jintae Kim, “1.55mW 2GHz ERBW 7b 800MSps 3-stage Pipelined SAR ADC in 28nm CMOS using a Kickback-Cancelling 7T-Dynamic Residue Amplifier with only 16fF Input Capacitance,” in Proceedings of IEEE ASSCC, Nov. 7-10, 2021.

• Sein Oh, Younggyun Oh, Juyong Lee, Kihyun Kim, Seungjun Lee, Jintae Kim, and Hyungil Chae, “A 85dB DR 4-MHz BW Pipelined Noise-Shaping SAR ADC with 1-2 MASH Structure,” IEEE Journal of Solid-State Circuits (JSSC), vol. 56, no. 11, pp. 3424-3433, 2021.

• Jae Sik Yoon, Jiyoon Hong, Hyungil Chae, and Jintae Kim, “A 72-dB DR 625-kHZ BW 2nd-order Noise-Shaping SAR ADC Utilizing a Temperature-Compensated Dynamic Amplifier and a Digital Mismatch Calibration,” IEEE ACCESS, vol. 9, pp. 39597 - 39607, Mar. 2021.

• Hyunmin Park, Hyungil Chae, and Jintae Kim, “An Optimal Digital Filtering Technique for Incremental Delta-Sigma ADCs using Passive Integrators,” MDPI Electronics, 10(2), Jan. 2021.

2020

• Sein Oh, Younggyun Oh, Junyoung Lee, Kihyun Kim, Seungjun Lee, Jintae Kim, and Hyungil Chae, “A 80dB DR 6MHz Bandwidth Pipelined Noise-Shaping SAR ADC with 1-2 MASH Structure,” in Proceedings of IEEE CICC, Mar. 2020

• Jongho Kim, Beomkyu Seo, Young H. Oh, Jung-Hoon Chun, Jae W. Lee, and Jintae Kim, “An 8-bit Ring-Amplifier based Mixed-signal MAC Circuit with FUll Digital Interface and Variable Accumulation Length,” IEEE ACCESS, vol. 9, pp. 5887-5894, Dec. 2020

• Jinook Jung and Jintae Kim, "A switching threshold programmable high-linearity transimpedance amplifier for OLED pixel current mismatch measurement, Journal of Information Display, Jan. 2020, DOI: 10.1080/15980316.2019.1708819.

• Minh Khang Chau, Nebiyu Getachew Arega, Nguyen Anh Nhung Tran, Jin Song, Sangmin Lee, Jintae Kim, Minsub Chung, and Dohyun Kim, “Single-point, Multianalyte, Label-free Contactless Conductivity De-tection for Microfluidic Isoelectric Focusing ”, Analytica Chimica Acta, vol. 1125, Mar. 2020, pp. 60-70.

2019

• Jae-Sik Yoon, Jiyoon Hong, and Jintae Kim, “A Digitally-Calibrated 70.98dB-SNDR 625kHz-Bandwidth Temperature-Tolerant 2nd-order Noise-Shaping SAR ADC in 65nm Using an Error-Feedback Structure,” in Proceedings of IEEE ASSCC, Nov. 4-6, 2019.

• Jaesik Yoon and Jintae Kim, “An Efficient Digital-Domain Calibration Technique for SAR ADCs using a Bridge Capacitor,” Journal of Semiconductor Technology and Science (JSTS), vol.19 , pp.79-86, Feb. 2019.

• Jiye Lim and Jintae Kim, “A 20kHz–16MHz Programmable Bandwidth 4th-order Active Filter using Gain-boosted Opamp with Negative Resistance in 65nm CMOS,” IEEE Transactions on Circuits and System II, vol. 66, pp.182-186, Feb. 2019.

• Sukyo Joung, Jintae Kim, Dohyun Kim, and Minsub Chung, “Microscale Formation of Immobilized pH Gradient in Simple Straight Channel,” MicroTAS 2019, Nov, Basel, Switzerland.

2018

• Jahoon Jin, Xuefan Jin, Jaehong Jung, Kiwon Kwon, Jintae Kim, and Jung-Hoon Chun, “A 0.75-3.0-Gb/s Dual-Mode Temperature-Tolerant Referenceless CDR with a Deadzone-Compensated Frequency Detector,” IEEE Journal of Solid-State Circuits (JSSC), vol. 53, no. 10, pp. 2994-3003, Oct. 2018.

• Heejune Lee and Jintae Kim, “A 12-bit 220MS/s Area-Efficient DAC in 65nm CMOS with Calibration-DAC Assisted Linearity Enhancement,” Journal of Semiconductor Technology and Science (JSTS), vol. 18, no. 4, pp. 433-437, Aug. 2018.

• Hyunjun Jung, Jintae Kim, and Yoonkey Nam, “Recovery of Early Neural Spikes from Stimulation Electrodes using a DC-Coupled Low-Gain High-Resolution Data Acquisition System,” Journal of Neuroscience Methods, vol. 304, pp. 118-125, July 2018.

• Minh Khang Chau, Nebiyu Getachew Arega, Jin Song, Hwajin Lee, Jintae Kim, Minsub Chung, and Dohyun Kim, “Quantitative and Multi-Species Determination of Isoelectric-Focused-Proteins Using Single-Point Microfluidic Contactless Conductivity Detection”, MicroTAS 2018, Kaohsiung, Taiwan, Nov. 11-15, 2018.

• Hyunmin Park and Jintae Kim, “A 0.8V Resistor-based Temperature Sensor in 65nm CMOS with Supply Sensitivity of 0.28C/V,” IEEE Journal of Solid-State Circuits (JSSC), vol. 53, no. 3, pp. 906-912, Mar. 2018.

• Jongsun Kim and Jintae Kim, “A High-Speed SerDes Transcevier for Wireless Proximity Communication,” Journal of Semiconductor Technology and Science (JSTS), vol. 18, no. 1, pp. 42-48, Feb. 2018.

2017

• Soyeon Joo, Jintae Kim, and SoYoung Kim, “Power-Supply Rejection Model Analysis of Capacitor-Less LDO Regulator Designs,” IEICE Transactions on Electronics, vol. e100.c, no. 5, pp. 504-512, May. 2017.

• Minyoung Yoon, Byungjoon Kim, Jintae Kim, and Sangwook Nam, “Design Optimization of Gm-C Filters via Geometric Programming,” IEICE Transactions on Electronics, vol. e100.c, no. 4, pp. 407-415, Apr. 2017.

• Hyunmin Park and Jintae Kim, Student Reserach Preview (SRP) in International Solid-State Circuit Conference (ISSCC) 2017, Feb

2016

• Yoonsu Park, Jintae Kim, and Chulwoo Kim, “A Scalable Bandwidth Mismatch Calibration Technique for Time-Interleaved ADCs,” IEEE Transactions on Circuits and System I (TCAS-I), vol. 63, no. 11, pp. 1889-1897, Nov. 2016.

• Yeji Kim, Kyung Joo Song, Jintae Kim, Minsub Chung, and Dohyun Kim, “Single Amino Acid Replacement Transforms mCherry to a Far-red fluorescence Protein,” Biotechnology and Bioprocess Enigineering, vol. 21, no. 6, pp. 720-725, Nov. 2016

• Ikchan Jang, SoYoung Kim, and Jintae Kim, “Power-Performance Tradeoff Analysis of CML-based High-Speed Transmitter Designs using Circuit-Level Optimization,” IEEE Transactions on Circuits and System I, vol. 63, no. 4, pp. 540-550, Apr. 2016.

• N.G. Area, H. Song, K.J., Song, Jintae Kim, M. Chung, and D. Kim “Contactless Conductivity Detection of Protein for Microfluidic Isoelectric Focusing,” MicroTAS 2016 Conference, Dublin, Ireland, Oct 9-13.

2015

• Hokyu Lee, Aurangozeb, Sejin Park, Jintae Kim, and Chulwoo Kim, “A 6-bit 2.5-GS/s Time-Interleaved Analog-to-Digital Converter Using Resistor-Array Sharing Digital-to-Anaog Converter,” IEEE Transactions on VLSI Systems (TVLSI), vol. 23, no. 11, pp. 2371-2383, Nov. 2015

• Jintae Kim, Siamak Modjtahedi, and Chih-Kong Ken Yang, “Redundancy-Based Calibration Technique for High-Speed Digital-to-Analog Converter,” IEEE Transactions on VLSI Systems (TVLSI), vol. 23, no. 11, pp. 2395-2407, Nov. 2015

• Jintae Kim and Minjae Lee, “Semi-Blind Digital-Domain Calibration of Pipelined A/D Converters via Convex Optimization,” IEEE Transactions on VLSI Systems (TVLSI), vol. 23, no. 7, pp. 1375-1379, Jul. 2015

• Ikchan Jang, Jintae Kim, and SoYoung Kim, “Accurate Delay Models of CMOS CML Circuits for Design Optimization,” Analog Integrated Circuits and Signal Processing, vol. 82, no. 1, pp. 297-307, Jan. 2015

• Sangwoo Han, Taegyu Kim, Jintae Kim, and Jongsun Kim, “A 10Gbps SerDes for Wireless Chip-to-Chip Communication,” International Soc Conference (ISOCC) 2015, Kyungju, Korea, Nov. 2-5 (Best Paper Award)

• K. Min, S. Y. Kim, D. H. Jeong, A. R. Park, S. A, Lee, J. H. L, J. Kim, and Jintae Kim, “A label-free biosensor based on impedance analysis for DNA characteriazation,” 10th International Workshop on Impedance Spectroscopy, Chemnitz, Germany, Sep. 26-29 (Best Poster Award)

2014

• Jintae Kim, Siamak Modjtahedi, and Chih-Kong Ken Yang, “Flexible-Assignment Calibration Technique for Mismatch-Constrained Digital-to-Analog Converteres,” IEEE Transactions on VLSI Systems (TVLSI), vol. 22, no. 9, pp. 1934-1944, Sep. 2014

• Seok Kim, Eun-Young Jin, Kee-Won Kwon, Jintae Kim, and Jung-Hoon Chun, “A 6.4-Gb/s Voltage-Mode Near-Ground Receiver with a 1-Tap Data & Edge DFE,” IEEE Transactions on Circuits and Systems II, vol. 61, no. 6, Jun. 2014

• Ikchan Jang, Soyeon Joo, Soyoung Kim, and Jintae Kim, “Model-Based Synthesis of High-Speed Serial-Link Transmitte Designs,” Frontiers in Analog CAD, July 2014, Grenoble, France.

• Sangwoo Han, Jintae Kim and Jongsun Kim, “Programmable Fractional-Ratio Frequency Multiplying Clock Generator,” IET Electron Letter, vol. 50, no. 3, pp. 163-165, Jan. 2014

2013

• Jintae Kim and Chester Sungchung Park, “A Calibration Technique for Multi-bit Stage Pipelined A/D Converters via Least-Sqaure Method,” IEEE Transactions on Instrumentation and Measurement (TIM), vol. 62, no. 12, pp.3390-3392, Dec. 2013

• Jintae Kim, “A Convex Macromodeling of Dynamnic Comparator for Anlaog Circuit Synthesis,” Analog Integrated Circuits and Signal Processing, vol. 77, no. 2, pp. 299-305, Nov. 2013

• Perrott, M. H.,Salvia, J. C., Lee, F. S., Partridge, A., Mukherjee, S., Arft, C., Jintae Kim, Arumugam, N., Gupta, P., Tabatabaei, S., Pamarti, S., Lee, H.-C., Assaderaghi, F., , “A Temperature-to-Digital Converter for a MEMS-Based Programmable Oscillator With < 0.5ppm Frequency Stability and < 1-ps Integrated Jitter,” IEEE Journal of Solid-State Circuits (JSSC), vol.48, no.1, pp. 276-291, Jan. 2013

Pre-2012

• Michael H. Perrott, Jim Salvia, Fred S. Lee, Aaron Partridge, Shouvik Mukherjee, Carl Arft, Jintae Kim, Niveditha Arumugam, Pavan Gupta, Sassan Tabatabaei, Sudhakar Pamarti, Haechang Lee, Fari Assaderaghi, “A temperature-to-digital converter for a MEMS-based programmable oscillator with better than +- 0.5ppm frequency stability,” in Proceedings of IEEE International Solid-State Circuit Conference (ISSCC), pp.206-208, Feb. 2012

• Jintae Kim, Sotirios Limotyrakis, and Chih-Kong Ken Yang, “Multi-level Power Optimization for Pipelined A/D Converters,” IEEE Transactions on VLSI systems (TVLSI) , vol. 19, no. 5, May 2011.

• Jintae Kim, Ritesh Jhaveri, Jason Woo, and Chih-Kong Ken Yang, “Circuit-Level Performance Evaluation of Schottky Tunneling Transistor in Mixed-Signal Applications,” IEEE Transactions on Nanotechnology (TNANO), vol. 10, no. 1, Mar 2011.

• Jintae Kim, Lieven Vandenberghe, and Chih-Kong Ken Yang, “Convex Piece-wise Linear Modeling Method for Circuit Optimization via Geometric Programming,” IEEE Transactions on Computer-Aided Design of Integrated Circuits (TCAD), vol. 29, no. 11, pp.1823-1827, Nov 2010.

• Jintae Kim, Hamid Hatamkhani, and Chih-Kong Ken Yang, “A Large-Swing Transformer-Boosted Transmitter with >VDD Swing,” IEEE Journal of Solid-State Circuits (JSSC), vol. 42, no. 5, pp.1131-1142, May 2007.

• Jintae Kim, Ritesh Jhaveri, Jason Woo, and Chih-Kong Ken Yang, “ Device-Circuit Co-Optimization for Mixed-mode Circuit Design via Geometric Programming,” in Proceedings of International Conference on Computer-Aided Design (ICCAD), pp. 470-475, Nov. 2007.

• Jintae Kim, Hamid Hatamkhani, and Chih-Kong Ken Yang, “An 8Gb/s Transformer-Boosted Transmitter with >VDD Swing,” in Proceedings of IEEE International Solid-State Circuit Conference (ISSCC), pp.94-95, Feb. 2006.

• Jintae Kim, Jaeseo Lee, Lieven Vandenberghe, and Chih-Kong Ken Yang, “Techniques for Improving the Accuracy of Geometric-Programming based Analog Circuit Design Optimization,” in Proceedings of International Conference on Computer-Aided Design (ICCAD), pp.863-870, Nov. 2004