MSEL - Journal Papers

Electronics Engineering Department, Konkuk Univeristy

2017

Jiye Lim and Jintae Kim, “A 20kHz–16MHz Programmable Bandwidth 4th-order Active Filter using Gain-boosted OTA with Negative Resistance in 65nm CMOS,” working paper

Heejune Lee and Jintae Kim, “A 12-bit 220MS/s Area-Efficient DAC in 65nm CMOS with Calibration-DAC Assisted Linearity Enhancement,” under review

Jaesik Yoon and Jintae Kim, “An Efficient Digital-Domain Calibration Technique for SAR ADCs using a Bridge Capacitor,” under review

Hyunmin Park and Jintae Kim, “A 0.8V Resistor-based Temperature Sensor in 65nm CMOS with Supply Sensitivity of 0.28C/V,” under review

Jongsun Kim and Jintae Kim, “A High-Speed SerDes Transcevier for Wireless Proximity Communication,” under review.

Soyeon Joo, Jintae Kim, and SoYoung Kim, “Power-Supply Rejection Model Analysis of Capacitor-Less LDO Regulator Designs,” IEICE Transactions on Electronics, vol. e100.c, no. 5, pp. 504-512, May. 2017.

Minyoung Yoon, Byungjoon Kim, Jintae Kim, and Sangwook Nam, “Design Optimization of Gm-C Filters via Geometric Programming,” IEICE Transactions on Electronics, vol. e100.c, no. 4, pp. 407-415, Apr. 2017.

2016

Yoonsu Park, Jintae Kim, and Chulwoo Kim, “A Scalable Bandwidth Mismatch Calibration Technique for Time-Interleaved ADCs,” IEEE Transactions on Circuits and System I (TCAS-I), vol. 63, no. 11, pp. 1889-1897, Nov. 2016.

Yeji Kim, Kyung Joo Song, Jintae Kim, Minsub Chung, and Dohyun Kim, “Single Amino Acid Replacement Transforms mCherry to a Far-red fluorescence Protein,” Biotechnology and Bioprocess Enigineering, vol. 21, no. 6, pp. 720-725, Nov. 2016

Ikchan Jang, SoYoung Kim, and Jintae Kim, “Power-Performance Tradeoff Analysis of CML-based High-Speed Transmitter Designs using Circuit-Level Optimization,” IEEE Transactions on Circuits and System I, vol. 63, no. 4, pp. 540-550, Apr. 2016.

2015

Xuefan Jin, Jun-Han Bae, Jung-Hoon Chun, Jintae Kim, and Kee-Won Kwon, “A 1.25GHz Low Power Multi-phase PLL Using Phase Interpolation between Two Complementary Clocks,” Journal of Semiconductor Technology and Science, vol. 15, no. 6, pp.594-600, Dec. 2015

Hokyu Lee, Aurangozeb, Sejin Park, Jintae Kim, and Chulwoo Kim, “A 6-bit 2.5-GS/s Time-Interleaved Analog-to-Digital Converter Using Resistor-Array Sharing Digital-to-Anaog Converter,” IEEE Transactions on VLSI Systems (TVLSI), vol. 23, no. 11, pp. 2371-2383, Nov. 2015

Jintae Kim, Siamak Modjtahedi, and Chih-Kong Ken Yang, “Redundancy-Based Calibration Technique for High-Speed Digital-to-Analog Converter,” IEEE Transactions on VLSI Systems (TVLSI), vol. 23, no. 11, pp. 2395-2407, Nov. 2015

Jintae Kim and Minjae Lee, “Semi-Blind Digital-Domain Calibration of Pipelined A/D Converters via Convex Optimization,” IEEE Transactions on VLSI Systems (TVLSI), vol. 23, no. 7, pp. 1375-1379, Jul. 2015

Ikchan Jang, Jintae Kim, and SoYoung Kim, “Accurate Delay Models of CMOS CML Circuits for Design Optimization,” Analog Integrated Circuits and Signal Processing, vol. 82, no. 1, pp. 297-307, Jan. 2015

2014

Jintae Kim, Siamak Modjtahedi, and Chih-Kong Ken Yang, “Flexible-Assignment Calibration Technique for Mismatch-Constrained Digital-to-Analog Converteres,” IEEE Transactions on VLSI Systems (TVLSI), vol. 22, no. 9, pp. 1934-1944, Sep. 2014

Seok Kim, Eun-Young Jin, Kee-Won Kwon, Jintae Kim, and Jung-Hoon Chun, “A 6.4-Gb/s Voltage-Mode Near-Ground Receiver with a 1-Tap Data & Edge DFE,” IEEE Transactions on Circuits and Systems II, vol. 61, no. 6, Jun. 2014

Sangwoo Han, Jintae Kim and Jongsun Kim, “Programmable Fractional-Ratio Frequency Multiplying Clock Generator,” IET Electron Letter, vol. 50, no. 3, pp. 163-165, Jan. 2014

2013

Jintae Kim and Chester Sungchung Park, “A Calibration Technique for Multi-bit Stage Pipelined A/D Converters via Least-Sqaure Method,” IEEE Transactions on Instrumentation and Measurement (TIM), vol. 62, no. 12, pp.3390-3392, Dec. 2013

Jintae Kim, “A Convex Macromodeling of Dynamnic Comparator for Anlaog Circuit Synthesis,” Analog Integrated Circuits and Signal Processing, vol. 77, no. 2, pp. 299-305, Nov. 2013

Perrott, M. H.,Salvia, J. C., Lee, F. S., Partridge, A., Mukherjee, S., Arft, C., Jintae Kim, Arumugam, N., Gupta, P., Tabatabaei, S., Pamarti, S., Lee, H.-C., Assaderaghi, F., , “A Temperature-to-Digital Converter for a MEMS-Based Programmable Oscillator With < 0.5ppm Frequency Stability and < 1-ps Integrated Jitter,” IEEE Journal of Solid-State Circuits (JSSC), vol.48, no.1, pp. 276-291, Jan. 2013

2012

J.-H. Moon, W. Jeong, Jintae Kim, K. Kwon, Y. Jun, and J.-H. Chun, “A 2.0GS/s 5b Current-mode ADC-based Receiver with Embedded Channel Equalizer”, Journal of IEEK, vol. 49, no. 12, pp. 184-183, Dec. 2012

2011

Jintae Kim, Sotirios Limotyrakis, and Chih-Kong Ken Yang, “Multi-level Power Optimization for Pipelined A/D Converters,” IEEE Transactions on VLSI systems (TVLSI) , vol. 19, no. 5, May 2011.

Jintae Kim, Ritesh Jhaveri, Jason Woo, and Chih-Kong Ken Yang, “Circuit-Level Performance Evaluation of Schottky Tunneling Transistor in Mixed-Signal Applications,” IEEE Transactions on Nanotechnology (TNANO), vol. 10, no. 1, Mar 2011.

2010

Jintae Kim, Lieven Vandenberghe, and Chih-Kong Ken Yang, “Convex Piece-wise Linear Modeling Method for Circuit Optimization via Geometric Programming,” IEEE Transactions on Computer-Aided Design of Integrated Circuits (TCAD), vol. 29, no. 11, pp.1823-1827, Nov 2010.

2007

Jintae Kim, Hamid Hatamkhani, and Chih-Kong Ken Yang, “A Large-Swing Transformer-Boosted Transmitter with >VDD Swing,” IEEE Journal of Solid-State Circuits (JSSC), vol. 42, no. 5, pp.1131-1142, May 2007.